Semiconductor device fabrication frequently involves patterning features through the use of a mask and photo-sensitive material. Due to constraints in the lithographic process, the pattern formed in the photo-sensitive material does not coincide exactly with the mask pattern. In particular, for rectangular patterns, corners round and ends pull back. Thus conventional masks often compensate for this phenomenon, and the mask is formed with features that differ somewhat from the feature desired to be patterned in the photo-sensitive material. One approach utilizes additional sub-resolution features. The sub-resolution features are placed in a location that affects the manner in which the main features are patterned in the lithography process. These types of features are called optical proximity correction features, and are often utilized to pull two main features closer together when patterned. Often these main features are used to form the gate of a transistor.
However, as transistor sizes shrink, limits on inspection capabilities limit how close two main features may be formed to each other. Conventionally, every mask must be inspected, and the use of optical proximity correction features between two main features cannot always be utilized because the inspection capabilities cannot inspect closely-spaced features.